ELECTRONICS - [designs & projects] - [I²C board] - [page 2/8]
2. I²C BASICS
:: 2.1 What is I²C?
I²C stands for "Inter IC Communication", and is a bus system which is developed by
PHILIPS. The goal of this electronic-giant was to limit the number of PCB tracks between IC's.
This goal was reached and I²C is now being used in dozens of applications, like
in televisions. Shortly described is I²C a bus system between several IC's, with the
advantage only very little wires are required between the IC's.
There are only 3 common wires needed to connect devices to each other: SDA (Serial Data),
SCL (Serial Clock) and the ground. The data bits are sent serial over the lines: bit per bit.
Because all devices are connected to a common bus, a method had to be found to communicate
with a certain device. This problem was solved by using an addressing system: each device on
the bus gets a unique address, which can be set manually.
In I²C there are "masters" and "slaves": A master can begin a communication on the bus, while a slave only listens to the bus until the master talks to it.
:: 2.2 The SCL and SDA data lines
The SCL and SDA lines are needed for the data transport over the I²C bus. The transport itself happens
via the SDA line (Serial Data), clock signals are generated via the SCL line (Serial Clock). The data
can flow bidirectional over the lines: from master to slave of from slave to master. The clock signals
are used for the data synchronization.
The SCL and SDA lines are connected to the power supply through a pull-up resistor. This means the line is always "high", unless one or more devices are making the line low by connecting them to the ground. The data on the data line must be stable wile the clock signal is "high", and should only be changed when the clock signal is "low". The picture below shows where the data must be stable, and where it may be changed.
:: 2.3 Start & Stop Condition
I²C knows 2 special states: "start" and "stop". The start indicates when a master starts using the bus.
If this master ends the use of this bus, it generates a stop condition.
A start condition is a change from "high" to "low" on the SDA line, while the SCL line is "high". This
means the condition happens in the period where normal data must be stable. A stop condition is a change
from "low" to "high" on the SDA line, while the SCL line is "high".
:: 2.4 Byte format
Data is being placed on the bus in bytes, containing 8 bits. The MSB (Most Significant Bit) is send first.
After each sent byte, from master or slave, follows an ACK (acknowledge bit). A bit can only be placed on
the bus when the clock signal is "high".
:: 2.5 Acknowledge bit
After the sending of an 8-bit commando, an acknowledge bit should follow. When the master has sent data on
the line, the slave had to generate the ACK bit. If the slave is sending data on the line, the master has to
generate this bit.
:: 2.6 Read/Write mode
A master can both read or write from a slave. Before this master can do this, it
has to specify if it wants to read or write. This happens via the LSB (Least
Significant bit) of the address byte. If this bit is "0", read mode is enabled. Otherwise, the
write mode is active.
